/*
 * Copyright (c) Huawei Technologies Co., Ltd. 2019-2022. All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 and
 * only version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
 * GNU General Public License for more details.
 *
 * Description:
 * Author: huawei
 * Create: 2019-10-15
 */

#ifndef HILINK_SUBCTRL_REG_OFFSET_H
#define HILINK_SUBCTRL_REG_OFFSET_H

/* HILINK_SUBCTRL Base address of Module's Register */
#define HILINK_SUBCTRL_BASE                       (0x0)

/* HILINK_SUBCTRL Registers' Definitions */
#define HILINK_SUBCTRL_0_REG (HILINK_SUBCTRL_BASE + 0x2004)
#define HILINK_SUBCTRL_1_REG (HILINK_SUBCTRL_BASE + 0x2008)
#define HILINK_SUBCTRL_2_REG (HILINK_SUBCTRL_BASE + 0x2010)
#define HILINK_SUBCTRL_3_REG (HILINK_SUBCTRL_BASE + 0x2020)
#define HILINK_SUBCTRL_4_REG (HILINK_SUBCTRL_BASE + 0x2024)
#define HILINK_SUBCTRL_5_REG (HILINK_SUBCTRL_BASE + 0x2028)
#define HILINK_SUBCTRL_6_REG (HILINK_SUBCTRL_BASE + 0x3000)
#define HILINK_SUBCTRL_7_REG (HILINK_SUBCTRL_BASE + 0x300C)
#define HILINK_SUBCTRL_8_REG (HILINK_SUBCTRL_BASE + 0x3010)
#define HILINK_SUBCTRL_9_REG (HILINK_SUBCTRL_BASE + 0x3018)
#define HILINK_SUBCTRL_10_REG (HILINK_SUBCTRL_BASE + 0x301C)
#define HILINK_SUBCTRL_11_REG (HILINK_SUBCTRL_BASE + 0x3400)
#define HILINK_SUBCTRL_12_REG (HILINK_SUBCTRL_BASE + 0x3404)
#define HILINK_SUBCTRL_13_REG (HILINK_SUBCTRL_BASE + 0x3408)
#define HILINK_SUBCTRL_14_REG (HILINK_SUBCTRL_BASE + 0x340C)
#define HILINK_SUBCTRL_15_REG (HILINK_SUBCTRL_BASE + 0x3410)
#define HILINK_SUBCTRL_16_REG (HILINK_SUBCTRL_BASE + 0x3414)
#define HILINK_SUBCTRL_17_REG (HILINK_SUBCTRL_BASE + 0x6000)
#define HILINK_SUBCTRL_18_REG (HILINK_SUBCTRL_BASE + 0x6004)
#define HILINK_SUBCTRL_19_REG (HILINK_SUBCTRL_BASE + 0x6008)
#define HILINK_SUBCTRL_20_REG (HILINK_SUBCTRL_BASE + 0x600C)
#define HILINK_SUBCTRL_21_REG (HILINK_SUBCTRL_BASE + 0x6010)
#define HILINK_SUBCTRL_22_REG (HILINK_SUBCTRL_BASE + 0x6014)
#define HILINK_SUBCTRL_23_REG (HILINK_SUBCTRL_BASE + 0x6018)
#define HILINK_SUBCTRL_24_REG (HILINK_SUBCTRL_BASE + 0x601C)
#define HILINK_SUBCTRL_25_REG (HILINK_SUBCTRL_BASE + 0x6020)
#define HILINK_SUBCTRL_26_REG (HILINK_SUBCTRL_BASE + 0x6024)
#define HILINK_SUBCTRL_27_REG (HILINK_SUBCTRL_BASE + 0x6028)
#define HILINK_SUBCTRL_28_REG (HILINK_SUBCTRL_BASE + 0x602C)
#define HILINK_SUBCTRL_29_REG (HILINK_SUBCTRL_BASE + 0x6030)
#define HILINK_SUBCTRL_30_REG (HILINK_SUBCTRL_BASE + 0x6034)
#define HILINK_SUBCTRL_31_REG (HILINK_SUBCTRL_BASE + 0xF100)
#define HILINK_SUBCTRL_32_REG (HILINK_SUBCTRL_BASE + 0xF110)
#define HILINK_SUBCTRL_33_REG (HILINK_SUBCTRL_BASE + 0xFF00)
#define HILINK_SUBCTRL_34_REG (HILINK_SUBCTRL_BASE + 0xFF04)
#define HILINK_SUBCTRL_35_REG (HILINK_SUBCTRL_BASE + 0xFF08)
#define HILINK_SUBCTRL_36_REG (HILINK_SUBCTRL_BASE + 0xFF0C)
#define HILINK_SUBCTRL_37_REG (HILINK_SUBCTRL_BASE + 0xFF10)
#define HILINK_SUBCTRL_38_REG (HILINK_SUBCTRL_BASE + 0xFF14)
#define HILINK_SUBCTRL_39_REG (HILINK_SUBCTRL_BASE + 0xFFFC)

#endif // HILINK_SUBCTRL_REG_OFFSET_H
